1. Technical Field
The present invention relates generally to identifying layout pattern candidates, and in particular, to a computer implemented method for automatically identifying layout pattern candidates in selected regions for use in analyzing performance issues.
2. Description of Related Art
Some of the most complicated devices ever engineered by man are semiconductor integrated circuits. Some circuits such as microprocessors may include a billion transistors or more, and are getting more complicated in their design every year. In addition, the process of manufacturing these devices is getting more difficult and complicated as semiconductor manufacturing processes continue to develop the ability to manufacture smaller elements and more dense integrated circuits. This includes the use of photomasks that are denser and more complicated for patterning these smaller elements on semiconductor wafers.
As a result, testing throughout the design and manufacturing processes is necessary to be able to manufacture these semiconductor integrated circuits. This includes testing of circuit designs, testing of layout designs derived from the circuit designs, and testing of the resulting manufactured integrated circuits. Test results of manufactured products may be used to further analyze and possible modify the underlying circuit designs and layout designs.